10th Int'l Symposium on Quality Electronic Design

نویسندگان

  • Jonathan Rosenfeld
  • Eby G. Friedman
چکیده

Guidelines for distributing a buck converter rectifier for application to three-dimensional (3-D) circuits is described. The 3-D rectifier exploits the properties of transmission lines to generate and distribute power supplies to different planes. As compared to a conventional rectifier, the proposed rectifier circuit only requires moderately size capacitors without the use of onchip inductors. A case study in a 0.18 μm CMOS 3-D technology demonstrates the generation of a 1.2 volt power supply delivering 700 mA peak current.

برای دانلود متن کامل این مقاله و بیش از 32 میلیون مقاله دیگر ابتدا ثبت نام کنید

ثبت نام

اگر عضو سایت هستید لطفا وارد حساب کاربری خود شوید

منابع مشابه

10th Int'l Symposium on Quality Electronic Design

Chenyue Ma, Bo Li, Lining Zhang, Jin He, Xing Zhang, Xinnan Lin, and Mansun Chan 1 The Micro& Nano Electronic Device and Integrated Technology Group, The Key Laboratory of Integrated Microsystems, Shenzhen Graduate School of Peking University, Shenzhen, P. R .China; 2 TSRC, Key Laboratory of Microelectronic Devices and Circuits of Ministry of Education, Institute of Microelectronics, EECS, Peki...

متن کامل

10th Int'l Symposium on Quality Electronic Design

In this paper challenges observed in 65nm technology for circuits utilizing subthreshold region operation are presented. Different circuits are analyzed and simulated for ultra low supply voltages to find the best topology for subthreshold operation. To support the theoretical discussions different topologies are analyzed and simulated. Various aspects of flip-flop circuits are described in det...

متن کامل

10th Int'l Symposium on Quality Electronic Design

On-chip circuit aging sources, like negative bias temperature instability (NBTI), hot-carrier injection (HCI), electromigration, and oxide breakdown, are reducing expected chip lifetimes. Being able to track the actual aging process is one way to avoid unnecessarily large design margins. This work proposes a sensing scheme that uses sets of reliability sensors capable of accurately tracking NBT...

متن کامل

10th Int'l Symposium on Quality Electronic Design

Logic Cell modeling is an important component in the analysis and design of CMOS integrated circuits, mostly due to nonlinear behavior of CMOS cells with respect to the voltage signal at their input and output pins. A current-based model for CMOS logic cells is presented which can be used for effective crosstalk noise and delta delay analysis in CMOS VLSI circuits. Existing current source model...

متن کامل

10th Int'l Symposium on Quality Electronic Design

In this paper, we propose a novel statistical decap allocation method to reduce the voltage drop noise in the presence of variational leakage current sources. The new method can derive the closed form of decoupling capacitance (decaps) in terms of variational parameters from the variational leakage currents. It treats the deterministic decap method as a black box and can work with any existing ...

متن کامل

ذخیره در منابع من


  با ذخیره ی این منبع در منابع من، دسترسی به آن را برای استفاده های بعدی آسان تر کنید

برای دانلود متن کامل این مقاله و بیش از 32 میلیون مقاله دیگر ابتدا ثبت نام کنید

ثبت نام

اگر عضو سایت هستید لطفا وارد حساب کاربری خود شوید

عنوان ژورنال:

دوره   شماره 

صفحات  -

تاریخ انتشار 2008